The present invention relates to a high-speed receiver for digital communications and, more particularly, to a system and method for cancellation of offset voltage of a differential input buffer.
Serial high-bandwidth communication requires terminated input buffers with sensitivity in the range of several mV. Input stage manufacturing offset is usually also in range of several mV. The manufacturing offset can not be diminished by enlarging the size of the MOS devices used in the input buffer due to input return-loss constraints. Moreover, a termination resistor is required between the differential inputs in order to match the impedance of the transmission medium. The termination resistor couples the differential inputs together and makes it difficult to cancel the offset by injecting compensating currents at the inputs of the buffer.
The present invention introduces an offset cancellation circuit at the differential outputs of the first differential amplification stage of the receiver, in contradistinction to the more common prior-art technique of placing the cancellation circuit at the inputs of this first differential amplification stage. The cancellation circuit is composed of a differential output transistor pair with a controlled DC input voltage. In addition, the cancellation method is described.
Various attempts have been made to cancel offset voltage in differential inputs.
U.S. Pat. No. 4,827,222 to Hester, et al. introduces trimming of input offset voltage of a differential amplifier using a pair of resistance networks which are connected to the emitters of a pair of current mirror transistors. The offset is corrected by fuse-selected resistor strings which take up significantly more area on an integrated circuit die than the MOS transistors used in the present invention.
U.S. Pat. No. 4,760,286 to Pigott cancels the offset in a PNP comparator circuit by driving unequal currents to the PNP transistors to eliminate offset in the input devices. This solution requires the use of multicollector PNP transistors, and is not applicable to MOS systems.
Furthermore, prior-art solutions do not compensate for changes in offset voltage due to aging of circuit components. In the present invention the currents to be applied for offset voltage compensation are determined anew at system startup, and can even be adjusted during system operation.
There is thus a widely recognized need for, and it would be highly advantageous to have, a system and method for correcting offset voltage in terminated MOS input buffers, with compensation for aging of circuit components, having compact MOS circuitry rather than resistors for providing compensation currents, and not requiring the blowing of fuses, as provided by the present invention.
Definitions
As used herein, unless otherwise specified, the term “driving” refers to providing a signal input to a device. For example, a signal source connected to an amplifier “drives” the amplifier, and can be said to be “drivingly connected” to the amplifier. The control of a device via intermediate devices is also included within the scope of this definition. Thus, for example, a signal which controls a final amplifier via intermediate amplifiers is also said to be drivingly connected to the final amplifier.